1. Field of the Invention
The present invention relates generally to a multiplexor, particularly to a multiplexor for multiplexing fixed-length packets in digital broadcasting of video and audio.
2. Description of the Related Arts
FIG. 1 is a block diagram illustrating a prior art multiplexor of this type. This multiplexor shows a case where three channels of video and audio are multiplexed. A case of multiplexing a plurality of channels other than three channels is also described similarly.
For picture (hereinafter referred to as video) inputs, a video signal for a first channel (ch) is outputted through preprocessing unit 101 and video encoder 102 for encoding a video signal, a video signal for a second channel is outputted through preprocessing unit 103 and video encoder 104 for encoding a video signal, and a video signal for a third channel is outputted through preprocessing unit 105 and video encoder 106 for encoding a video signal.
Multiplexor 107 is inputted with video encoded data from video encoders 102, 104 and 106, with audio encoded data from the first to third channels and with synchronization information.
The video encoded data and audio encoded data of the three channels are multiplexed at multiplexor 107 and outputted to a transmission line.
In this way, when audio data and video data are multiplexed, full number of channels to be multiplexed are inputted in parallel into one multiplexor unit with channels each having components of one channel (digital video data and digital audio data) respectively, and generates a multiplexed transmitting signal including a plurality of channels.
The prior art multiplexor, however, has a drawback that the number of channels to be multiplexed is limited by the number of input ports since just one multiplexor is applied for the multiplexing.
In addition, the prior art multiplexor has a drawback that since multiplexed data for a plurality of channels are processed by one multiplexor, when high quality digital video data, which requires a high transmission rate, is multiplexed, the load on the multiplexor is considerably increased by every increase of the number of channels in later on.
Furthermore, since information used for synchronous processing of video and audio in digital broadcasting is required to be added to multiplexed data, multiplexing a lot of channels with one multiplexor is limited.
Japanese Patent Application Laid-Open No.276930/92 discloses a technique for eliminating the drawback of limiting the number of multiplexed channels by the number of input ports.
This technique discloses a constitution to connect a plurality of multiplexors in serial stages, and multiplexing a plurality of audio channels, each multiplexor multiplexes also a multiplexed output of multiplexer in the preceding stage to transmit to the multiplexor at the subsequent stage.
In this technique, however, each multiplexor is inputted a great many audio data of a plurality of channels, so that the drawback of increasing the load on multiplexors at the later stages due to an increase in the number of channels is not eliminated.
Additionally, in such a multiplexor with multistage connections, when a multiplexor in the connections is in an abnormal condition or power-off state, data for any channels is not outputted to a transmission line even though a multiplexor at the subsequent stage is in a normal condition or power-on state.
In other words, the technique has a drawback that when an abnormality occurs in any one of multiplexors, all of the multiplexors in the system falls into malfunction.
It is an object of the present invention to provide a multiplexor in which the number of channels to be multiplexed is not limited, the load on a multiplexor is not increased and is capable of outputting data of channels inputted from normal multiplexing means to a transmission line even though an abnormal condition occurs in any one of multiplexing means.
In order to achieve the object mentioned above, the present invention provides a multiplexor for multiplexing a plurality of data comprising a plurality of multiplexing means connected in series, said multiplexing means having a first input section for inputting data of one channel, a second input section for inputting data outputted from multiplexing means at the preceding stage, a multiplexing section for multiplexing data inputted from the first and second input sections and a control section for controlling the first and second input sections and the multiplexing section.
Also, the present invention includes a case that the data of one channel is a fixed-length packet.
In addition, it is also a preferred aspect of the present invention in which said control section comprises a clock input portion for being inputted a clock from multiplexing means at the subsequent stage, a clock separating portion for separating and sending the inputted clock for controlling said first and second input sections and a clock output portion for transmitting a clock for controlling the second input section to a control section of the multiplexing means at the preceding stage, and in which the each multiplexing means comprises an abnormality detecting section for detecting an abnormality within the host multiplexing means and a switching section for separating the host multiplexing means from the multiplexing means at the preceding and subsequent stages to connect them directly when an abnormality is detected by the abnormality detecting section, also in which a packet generating unit is included for generating a stuffing packet when the multiplexing means is separated from the multiplexing means at the preceding and subsequent stages for stuffing a time slot otherwise inputted in by the host multiplexing means.